PCI-X™ Architecture Training

Course Description

The PCI-X full-length course provides a detailed and comprehensive understanding of the PCI-X bus architecture as defined by the PCI-X 2.0 specification. The course covers all aspects of the specification from a hardware design prespective and also discusses the software requirements of PCI-X implementations. This course provides in-depth information, example implementations, and practical guidance that will give you a running start on your design.



Course Length - 2 Days

Who Should Attend?

This in-depth course is hardware oriented, but is designed for both hardware and software engineers. The course contains practical examples of transactions on the link and describes error conditions to be aware of. It also covers all the rules required for a device to be specification compliant. This makes the course ideal for a system validation engineer who is evaluating an RTL-level, chip-level, system-level or systemboard-level design.

Course Content

* PCI Shortcomings and Protocol Review
* PCI and PCI-X 2.0 Device Types
* Register Bus Concept
* Sensing Device Types
* PCI-X Configuration Registers
* Bus Arbitration
* Latency Rules
* PCI-X Command Types
* PCI-X Burst, Dword and Split Transactions
* Early Transaction Termination
* 64-bit Operations
* Bridges and Relaxed Transation Ordering
* Error Detection Handling
* Electrical Basics
* Mode 2 Transfer Rates i.e. DDR and QDR Transactions
* Error Correcting Codes (ECC)
* Expanded Configuration Space
* Device ID Messaging
* 16 bit PCI-X

Recommended Prerequisite

A basic understanding of PCI architecture is required.

Corresponding Book

MindShare’s PCI-X System Architecture textbook (1st Edition)
Authors: Tom Shanley
Publisher: Addison Wesley

Contact Gillaspy Assocates at 805-987-1959 to schedule an on-site class.




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